GPU Glossary
Performance·1 min read

Issue Efficiency

The fraction of cycles on which a warp scheduler issues an instruction from an eligible warp.

Issue efficiency measures how well the warp scheduler keeps the execution pipes busy by issuing instructions from eligible warps.

Instructions were issued on three of the four clock cycles shown, for an issue efficiency of 75%. Diagram inspired by the CUDA Techniques to Maximize Compute and Instruction Throughput talk at GTC 2025.
Instructions were issued on three of the four clock cycles shown, for an issue efficiency of 75%. Diagram inspired by the CUDA Techniques to Maximize Compute and Instruction Throughput talk at GTC 2025.

At 100%, every scheduler issued an instruction on every cycle, which means there was at least one eligible warp on each cycle.

Below 100%, there were cycles where every active warp was stalled, waiting on data, resources or dependencies. On those cycles the scheduler sat idle and overall instruction throughput dropped.