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Performance·1 min read

Active Cycle

A clock cycle in which a Streaming Multiprocessor has at least one active warp resident, whether eligible or stalled.

An active cycle is a clock cycle in which a Streaming Multiprocessor has at least one active warp resident. That warp may be eligible or stalled.

Every cycle in this diagram is an active cycle. Inspired by the CUDA Techniques to Maximize Compute and Instruction Throughput talk at GTC 2025. — Every cycle in this diagram is an active cycle. Inspired by the CUDA Techniques to Maximize Compute and Instruction Throughput talk at GTC 2025.

Warp execution state: what active, eligible and stalled mean
Issue efficiency: measured as a fraction of active cycles