GPU Glossary
Device Hardware·1 min read

Register File

The Streaming Multiprocessor's fastest memory, made of 32 bit registers that hold data between operations by the cores.

The register file of a Streaming Multiprocessor is the primary store of bits in between their manipulation by the cores. Like CPU registers, it is built from very fast memory that keeps pace with the cores: about an order of magnitude faster than the L1 data cache.

The internal architecture of an H100 SM. The register file is shown in blue. Modified from NVIDIA's H100 white paper.
The internal architecture of an H100 SM. The register file is shown in blue. Modified from NVIDIA's H100 white paper.

Structure#

The register file is split into 32 bit registers that can be dynamically reallocated among data types, such as 32 bit integers, 64 bit floating point numbers, and (groups of) 16 bit or smaller floating point numbers.

These physical registers back the virtual registers of the Parallel Thread eXecution (PTX) intermediate representation.

Allocation and occupancy#

In Streaming Assembler (SASS), physical registers are allocated to threads by a compiler like ptxas, which optimizes register file usage by thread blocks.

Key idea If each thread block uses too much of the register file (high "register pressure"), fewer threads can be scheduled concurrently.

That lowers occupancy and can hurt performance by reducing opportunities for latency hiding.